Keeping up High Level Synthesis in Embedded Technology
An SoC or System on a Chip integrates many functions into a single chip. Most of the SoC chips available are not easy to modify and this has been one of the main grouse of embedded designers who work with these chips. It is a serious issue because it doesn’t allow the embedded engineers to harness the potential of the chip.
Recently, many companies have released new chips that are easier to modify. One of these new chips has the quite common embedded C/C++ development platform, including an easy to use IDE (Integrated Development Environment). This chip also contains an attached programmable logic. Combine this with the other changes and you will see that this new chip is much easier to exploit.
Those of you who are familiar with FPGA or field programmable gate array (integrated circuits that can be configured by the customer after assembly) will know the embedded industry is moving in the direction of high level synthesis. Many tools have already been developed for this. These allow embedded developers to write algorithms in C, System C and C++. These tools are saving a lot of time because C is a developer friendly language and it is easier to generate/verify algorithms in C. People are already saying that these new chips will have a big impact on embedded development in the future.